Microprocessors can be divided into several basic categories. In stack machines, all arithmetic-logic unit (ALU) operations are done on the uppermost register of an operand stack. In CISC machines, the operations are done directly in memory (i.e., operands are accessed from memory and the results stored in memory). In RISC machines, all operations are performed on addressable registers residing in the central processing unit (CPU). While the early microprocessors were stack machines, today most microprocessors are either CISC or RISC machines. With time, CISC and RISC machines have approached each other in design, with most modern CISC machines also having a register file where operations are performed. With the introduction by Sun Microsystems, Inc. of the Java™ programming language and the Java™ Virtual Machine (Java™ VM), the stack machines were reintroduced into modern microprocessors. Although the Java™ VM was intended primarily to run as software, there exist some hardware implementations.
Java™ is an object-oriented programming language, developed by Sun Microsystems, Inc., that has become a de facto standard in network programming and is also beginning to be utilized in the domain of embedded systems. The Java™ byte code is commonly executed in a software layer called the Java™ Virtual Machine, the specification for which is published by Sun Microsystems, Inc. To execute the Java™ byte code, an interpreter, or a “just-in-time” compiler, preferably in conjunction with some form of look-ahead technique to analyze potential program flow bottlenecks, or a cross-compiler for a specific hardware platform may be used. Alternatively, Java™ can be executed directly in silicon. Some Java™ hardware processors have a folding mechanism, which means that several instructions are combined and executed as one. However, most Java™ processors will operate as an interpreter, wherein each opcode is read and then the appropriate action is taken to execute the instruction.
The hardware approach is the preferred technical solution if Java™ is to be implemented in embedded systems, and in recent years, several hardware versions of Java™ virtual machines have been developed for embedded processor platforms. These processors, which support direct execution of Java™ instructions, are usually designed as 32-bit stack machines. Some rely on extensions to the Java™ binary format in order to offer features like direct addressing and bit manipulation instructions. Others do not execute Java™ binary codes directly, but have a very close architectural match to thereby increase performance of the virtual machine.
A major challenge when attempting to implement a Java™ VM in hardware is that some Java™ instructions have high semantic content and thus are very difficult to execute as atomic instructions. Trapping complex Java™ instructions and executing them as software routines with instructions native to the host architecture is a possible solution. But in order to do this, a mechanism is needed to access the Java™ operand stack using the native (RISC or CISC) instructions.
In the present assignee's earlier U.S. patent application Ser. No. 10/114,678, filed Apr. 1, 2002, with priority from U.S. provisional application 60/286,197, filed Apr. 23, 2001, entitled “Microprocessor for executing byte compiled Java™ code,” and published as US 2004/0015678 A1 on Jan. 22, 2004, and in the corresponding international application published as WO 2002/086699 A3 on Oct. 31, 2002, the concept of combining a RISC machine with a Java™ VM is described. In that earlier published application, a RISC microprocessor and a Java™ VM implemented in hardware are combined such that the hardware can operate in either a RISC state or a Java™ state. In order for the RISC microprocessor to access the Java™ operand stack and execute complex Java™ instructions as a RISC software routine, two bits, “X” and “Y,” are set in the status register to allow either the corresponding X or Y argument to be substituted with the register number that is pointed to by the operand stack pointer.
Additional mechanisms are sought for these combined microprocessors to improve access to the Java™ operand stack from the processors' RISC (or CISC) state.